Magma Integrates Design-for-Test Capabilities Into Blast Chip IC Implementation System

CUPERTINO, Calif.--(BUSINESS WIRE)--July 24, 2002--Magma® Design Automation, Inc. (Nasdaq:LAVA - News), a provider of chip design solutions, today announced that new design-for-test (DFT) capabilities for the Blast Chip® RTL-to-GDSII design system are currently in beta testing and will be available in the fourth quarter of 2002.

The addition of DFT capabilities to Blast Chip makes Magma the only electronic design automation (EDA) provider able to offer designers a single, RTL-to-GDSII chip implementation system that integrates DFT analysis and repair capabilities with logic synthesis, and that is based on a unified data model architecture. Magma's tightly integrated system eliminates the time-consuming, error-prone data transfers and timing closure iterations normally required for DFT, delivering superior chip performance and significantly reducing development cycles for deep submicron (DSM) designs.

"Committed to delivering on our original vision, we've had a very aggressive approach to developing and nurturing technology improvements," said Rajeev Madhavan, chairman and CEO of Magma. "Testability is a key component in a complete flow, and because we have an accessible data model architecture, new capabilities such as the DFT technology can fit easily into our flow while taking into account several design closure issues."

Integrating DFT for Improved Performance and Turnaround Time

Catching and correcting testability problems early in the flow is critical to minimizing the design cycle and reducing test costs. Magma has already worked with Mentor Graphics and LogicVision to provide a proven, seamless interface between their comprehensive test solutions involving BIST and ATPG, and Blast Chip.

The DFT option to Blast Chip enables the system to insert test structures during design implementation. This ensures that the entire design, including the test structures, is optimized throughout the implementation flow for timing, area and power. In a conventional flow, the netlist is output into a standalone DFT tool where test structures are inserted. The netlist is then input back into the implementation system for optimization. This point-tool approach can introduce errors, compromising timing and resulting in iterations and the need for RTL fixes.

With its unified datamodel architecture and integrated design and analysis engines, Magma's system is able to automatically analyze gated clocks, asynchronous resets, tri-state bus contention, perform memory and core isolation, perform scan insertion and reordering, and adjust the RTL to maximize coverage and testability while meeting design performance requirements.

Unified Data Model Eases Integration of Test Technology

Magma's single unified data model architecture provides the system's design and analysis engines with full access to complete design data, allowing them to concurrently analyze for power, area and timing without relying on complex, error-prone and time-consuming file-based interfaces. This unique architecture is fully accessible through a Tcl interface allowing fast and flexible integration. The technology is currently in beta testing with select Magma customers.

"We cannot emphasize enough the advantages of Magma's unified data model architecture," said Bob Smith, vice president of product marketing at Magma. "Because it is fully accessible, it greatly simplifies the process of integrating new technology. Working with our customers and partners, we continue to benefit from this unique architecture and are currently looking for ways to make it more widely available."

About Magma Design Automation

Magma software products enable chip designers to reduce the time required to design and produce complex integrated circuits in the communications, computing, consumer electronics, networking and semiconductor industries. Magma provides a single executable for RTL-to-GDSII chip design. The company's products, Blast Fusion(TM), Blast Chip®, Blast Plan(TM), Blast Noise® and Blast Prototype(TM) utilize Magma's proprietary FixedTiming® methodology and single data model architecture to reduce the timing-closure iterations often required between the logic and physical processes in conventional IC design flows. Magma's Diamond SI(TM) also leverages the single data model architecture to provide an integrated, standalone platform for post-layout, sign-off-quality signal integrity verification.

Magma maintains headquarters in Cupertino, Calif., as well as sales and support facilities in Silicon Valley, Los Angeles, Orange County and San Diego, Calif.; Boston, Mass.; Durham, N.C.; Laurys Station, Pa.; Austin and Dallas, Texas; Newcastle, Wash.; and in Germany, Israel, Japan, Korea, The Netherlands, Taiwan and the United Kingdom. The company's stock trades on Nasdaq under the ticker symbol LAVA. Visit Magma Design Automation on the Web at www.magma-da.com.

Magma, Blast Chip, Blast Noise and FixedTiming are registered trademarks and Blast Fusion, Blast Plan, Blast Prototype and Diamond SI are trademarks of Magma Design Automation. All other product and company names are trademarks and registered trademarks of their respective companies.

FORWARD-LOOKING STATEMENTS:

Except for the historical information contained herein, the matters set forth in this press release, including statements that Magma will release the DFT capabilities for Blast Chip in Q4, that this eliminates iterations normally required for DFT and delivers superior performance and reduced development cycles, are forward-looking statements within the meaning of the "safe harbor" provisions of the Private Securities Litigation Reform Act of 1995. These forward-looking statements are subject to risks and uncertainties that could cause actual results to differ materially including, but not limited to, Magma's ability to complete the integration and the ability of Magma's products to produce the desired results. Further discussion of these and other potential risk factors may be found in Magma's Form 10-K for the fiscal year ended March 31, 2002 filed with the Securities and Exchange Commission ("SEC") on June 28, 2002, and from time to time in Magma's SEC reports. These forward-looking statements speak only as of the date hereof. Magma disclaims any obligation to update these forward-looking statements.

     Magma Design Automation Inc.
     Monica Marmie, 408/864-2027
     monical@magma-da.com